The proposed work plan builds upon the hypothesis that P4 datapaths can implement tasks to parse and extract the payload data, perform some calculations (e.g., distance, threshold, temperature), filtering, and much more, including crafting custom messages sent to the target endpoint (e.g. Robotic systems, IoT devices) or the controller, to minimize latency and deliver in-time and on-time network services. The high-precision hybrid edge programmable dataplane should deliver precise timing and latency of packet delivery to provide the required high-precision control loops. Expected advances include in-time and on-time network-provided packet delivery services for target throughput and acceptable packet loss, moving beyond the state of the art at IEEE TSN, IETF DETNET, and ITU-T future network design discussions. The resulting datapath architecture will be experimentally evaluated through prototype implementation in real commercial targets and 10G, 25G, and 100G workloads using high-precision traffic generators (e.g. OSNT, T-Rex) and real application traffic.
P4, Embedded systems, HW/SW co-design.
Campinas, SP
FAPESP
January/2024
Christian Rothenberg
Monthly FAPESP scholarship:
First year: R$ 3.462,60
Second to fourth years: R$ 4.285,50
Plus 20% annually for research contingency funds
(Optionally) 1-Year Research Internship Abroad (BEPE) at a partner international institution
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