The candidate will work in the area of disaggregation of resources. Disaggregation is a concept where resources are separated into pools, facilitating elasticity, deployment and management. The main idea is to carry out the functional decomposition of applications into blocks of codes and map these blocks to different hardwares such as programmable network devices (e.g. Tofino switches), SmartNICs and FPGAs, which are used to perform network processing and other specialized functions, releasing the CPU to only handle applications. The focus of this research is to identify the blocks of a given application (to be defined), generate the Intermediate Representation (IR) using LLVM, and then compile the blocks to the right target.
Linux, virtualization, Python, computer networks. It is a must if the candidate has some knowledge on LLVM and Intermediate Representation, P4, Tofino and NetFPGA.
Sorocaba, SP
FAPESP
March/2023
Fábio L. Verdi
R$ 8,479.20 Plus 10% annually for research contingency funds
[1] Towards a Fully Disaggregated and Programmable Data Center. APSys ’22: Proceedings of the 13th ACM SIGOPS Asia-Pacific Workshop on Systems.
[2] CLARA – Automated SmartNIC Offloading Insights for Network Functions. SOSP 2021 – Proceedings of the 28th ACM Symposium on Operating Systems Principles.
[3] Offloading distributed applications onto smartnics using ipipe. SIGCOMM 2019 – Proceedings of the 2019 Conference of the ACM Special Interest Group on Data Communication.
[4] E3: Energy-Efficient Microservices on SmartNIC-Accelerated Servers. Proceedings of the Usenix ATC 2019.
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